FIG. 1 illustrates a cross-sectional view of conventional Flash memory devices. Each device comprises a floating gate stack 102 and 104. Each floating gate comprises an oxide layer 112, a first polysilicon layer 110 on the oxide layer 112, an oxide-nitride-oxide (ONO) layer 108 on the first polysilicon layer 110, and a second polysilicon layer 106 on the ONO layer 108. Each device also comprises active regions 118 and spacers 114. A contact 120 is created on the active region 118 between the two floating gate stacks 102 and 104.
FIG. 2 illustrates a surface view of arrays of conventional Flash memory devices on a die. The arrays comprise lines of polysilicon 202 along one direction on a die and lines of active regions 204 along another direction on the die. At the active regions and between two polysilicon lines 202 are the contacts 206.
A mask (not shown) is used to direct the etching of an insulator layer 122 to form a trench and for filling the trench with the contact material to form the contact 120. As the density of devices are increased for each die, the stacks 102 and 104 become closer. As the stacks 102 and 104 become closer, the allowed amount of misalignment of the mask becomes smaller. Misalignment of the mask may cause the contact 120 to touch one of the adjacent stacks 102 or 104, shorting that device. The misalignment of the mask may also cause the contact 120 to be close enough to an adjacent stack 102 or 104 to induce charge loss or gain, resulting in data loss. Thus, contact mask misalignment negatively impacts the yield and reliability of the Flash memory devices on the die.
However, it is difficult to calibrate the effects of contact mask misalignment. The amount of misalignment is difficult to determine, as is the allowable magnitude of the misalignment. Thus, the change to the manufacturing process to address the misalignment problem is difficult to ascertain.
Accordingly, there exists a need for a method and apparatus for calibrating failures in semiconductor memory devices due to contact mask misalignment. The method and apparatus should apply to Flash memory devices as well as other semiconductor memory devices. The present invention addresses such a need.